SPI: Framing

There is no standard framing at all
Unlike I2C, the bus is not shared, so there is no protocol
The bus is shared, but the individual CS is not
Every communication event is one-to-one

The structure of a frame depends on the peripheral
Flash memory uses a command-response protocol
It's half-duplex, and usually you fill with 0xff
With ADC chips, communication is usually full-duplex
You send parameters for the next sample while reading the previous one
Most often, the ADC speed is set by the SPI speed
Some ADC devices use two CS lines, and one is active high.
Some other chips offer a register array, and an IRQ pin

And there is the usual issue of CS policies.
As usual, read the whole data sheet before routing/coding